|
Impedance
field solver / PCB stackup |
|
|
|
|
|
|
NEW:
Speedstack PCB Impedance field solver and layer stackup package For a Speedstack evaluation
click here
|
|
|
Speedstack
PCB is ideal for
you if: For
more information on Speedstack layer stackup design click
here:
|
|
|
|
Clear
concise documentation Share and document stackup information in a clear and consistent format. Material usage and graphical stack up views can be printed or shared electronically in a format that is easily read by both interconnect designer and fabricator. |
|
|
Design
rules check: Real time
design rule check highlights, material mismatch, copper imbalance, RCC
foils on inner layers and other design parameters. |
|
|
Your
materials: PCB fabricators can build a library of commonly used materials and materials that are normally available from stock along with cost or performance information. Speedstack PCB allows you to direct import your materials library in text delimited form. This information may be shared with interconnect designers. This means that designers can at a glance choose materials on a basis of cost / lead time / or performance. |
| System requirements | |
| For PC system requirements for Speedstack PCB see AP605 | |