The Polar Application Note library includes a comprehensive resource of information on controlled impedance. Use the search engine below to locate your subject of interest.

Many of our PCB design customers ask us about modelling plated through hole (PTH) vias with respect to impedance. However, from a signal integrity standpoint, unconnected via stubs have a far larger effect on the signal than the geometry of the via itself. This note explains how the Polar Si9000 can help you check if, at your desired bit rate or operating frequency, you need to take steps to reduce or remove the effects of via stubs. 

Si6000 sample workbooks. Legacy Product index

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Audience: Will interest you if you want to offer initial training on how PCB fabrication affects impedance; this presentation is valuable to technicians starting training in PCB fabrication and new designers who need an initial insight into aspects of PCB fabrication. The note is also of interest to companies involved in assembling PCBs as it sheds some light on the processes a PCB undergoes before it is populated.

Key to producing good yields of high-quality PCBs is the relationship between the circuit designer, PCB layout engineer and front-end process engineers at the PCB fabricator. Accurate, traceable and repeatable test results are essential to feeding production data back into the production process in order to increase yields and lower unit costs.

"The Board Authority" article reprint (with thanks to Circuitree Magazine) 

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Controlled impedance traces have started to move from purely specialist applications into more commonplace use during the last few years. Here are some answers to questions most frequently asked of us.

As PCB signal switching speeds increase today's PCB designer needs to understand and control the impedance of PCB traces. So what is controlled impedance and why do we need to control PCB trace impedance?

Short signal transition times and high clock rates mean that today's PCB traces need to be considered as transmission lines. In this application note we look at two configurations of transmission line and see what determines the characteristic impedance of a PCB trace.

Today's high performance PCB traces are manufactured as transmission lines in microstrip or stripline construction. In this application note we look at several microstrip transmission line structures.

In this application note we look at the single-ended stripline structure — a line embedded in a dielectric between two reference planes — one of the two most popular constructions of transmission lines on PCBs.

An increasing number of designs (for example USB 2.0) calls for control of both odd and even mode impedance. This note briefly discusses signals and termination on coupled lines, and the importance of even and odd mode impedance.

Over simplified modelling of differential structures can lead to discrepancies of several ohms in controlled impedance calculations. This note explains why local variations in Er within a dielectric can lead to unexpected results. 

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When the length of a signal trace exceeds the quarter-risetime distance (1/4 of the distance a signal can travel in your logic device risetime) you should probably consider using controlled impedance traces.

Use the controls on this worksheet to determine the quarter-risetime distance of your system using your logic devices.

Note: This spreadsheet contains macro controls, you will need to set Excel's Tools Macro: Security: to Medium and when opening the file click on Enable Macros

Crosstalk is the unwanted coupling of energy between two or more adjacent lines. The electromagnetic fields between two closely coupled lines interact with each other and will affect the behaviour of the signals on both lines. This note discusses near and far-end crosstalk and includes formulas that will enable the maximum peak effect to be predicted.

Many of our PCB design customers ask us about modelling plated through hole (PTH) vias with respect to impedance. However, from a signal integrity standpoint, unconnected via stubs have a far larger effect on the signal than the geometry of the via itself. This note explains how the Polar Si9000 can help you check if, at your desired bit rate or operating frequency, you need to take steps to reduce or remove the effects of via stubs. 

After extensive use the flexible cables used with the CITS900 will deteriorate and this will ultimately affect measurements made. This application note is intended to help owners of the CITS900 to check on the condition of the flexible test cables and decide when to replace.

Nickel plating of copper PCB traces, widely practised in the microwave industry, is acceptable on short lengths of pad to accommodate gold plating; plating the whole trace length is generally not a good idea. This application note explains the effect that nickel will have on high frequency transmission lines.

This application note details the installation requirements for the Polar Instruments RITS520a Robotic Impedance Test System

From susceptibility to electrical interference to control of track cross-sectional dimensions — this note provides several good reasons why you shouldn’t put critical tracks on the surface layer of a PCB.

Sometimes board fabricators are asked to test PCB transmission lines at a given frequency.  In some cases boards are tested using a Vector Network Analyser (VNA) and in others a Time Domain Reflectometer (TDR); both instruments should offer similar readings. This note sets out to explain expected differences in measurement results, and points out where differences are due to incorrect test setup rather than any material problem.

This application note discusses RITS500s/520a fixture construction and includes detailed RITS500s/520a top plate mechanical drawings. The note describes board mounting and clearance and considers the advantages and disadvantages of various methods of indexing.

Top 12 reasons for specifying DC track resistance.

DC Track resistance is increasingly being specified on PCBs, here are some of the reasons that engineers point out to us why they needing to know and control DC trace resistance...

Modelling a Broadside Coupled Differential Pair without Ground

The Si8000 does not include the Broadside Coupled Differential Pair without Ground structure; this application note describes how the Surface Microstrip structure may be utilised to provide a workable solution.

Measurement of Track Resistance

Track resistance is usually much less than one ohm, often less than 0.1 ohm. The connection between a probe and the track surface can easily reach or exceed the track resistance; this application note describes how the associated measurement errors can be reduced using "Four Terminal" or "Kelvin Sensing" techniques.

Calculating Track Resistance

It is sometimes necessary to know the DC resistance of a track; this application note briefly describes how simple formulas may be used to derive track resistance.

Unbalanced Tracks and Differential Impedance  PDF  version  (29k) 

To obtain a particular value of differential impedance, the two signal tracks are usually assumed to have the same cross-section — the balanced track case, used in most impedance calculation software. However, due to manufacturing techniques and tolerances, the two tracks may have different cross-sections — the unbalanced track case. This article briefly discusses the effect that track unbalance has on the value of the differential impedance.

How measured impedance may vary from field solver calculations when using woven glass reinforced laminates

Field solvers are in widespread use for calculation and analyzing controlled impedance structures. This note describes how, especially in fine geometry differential structures, differences of Er between the curing resin system and the woven glass reinforcement can result in differences between calculated and measured impedances.

Controlled Impedance design for test

This application note describes how implementing a few simple design considerations will assist fabricators achieve best yields and reduce the cost of high performance boards.

Sources of impedance measurement error  

When measuring impedance with a Polar CITS or any other TDR there are a number of sources of potential measurement error. This application note sets out to explain those error sources and how you can minimise them in order to achieve repeatable and accurate measurements.

Characterising your process

The powerful math behind field solving tools which calculate impedance relies on the use of "ideal" materials. Unfortunately in the real world life is not quite as simple. This note briefly discusses characterising your process in order to achieve maximum yields.

Choosing the best probe for your application  

When measuring impedance with a Polar CITS or any other TDR probe choice is important, this application note sets out to clarify which probe is ideal and clarify some of the misunderstandings that may exist.

IP Probe footprints ( AP146)

Testing with Test Coupons

The accuracy of a controlled impedance trace on a PCB is usually critical to the correct performance of the PCB. This note describes some of the practical difficulties you'll sometimes run into when testing a controlled impedance PCB.

Sample coupon — Gerber Data mpcd1345.zip (170k)

CITS25 (End of life support) De-activation Procedure.

Support option information.

Test Procedure for Rambus® boards

This note describes the procedure for impedance measurement on the Rambus high speed memory architecture using the Polar Instruments CITS500s Controlled Impedance Test System.

For those who would like more information on signal integrity issues, this note contains a list of books recommended by Polar.

www.emeraldinsight.com/cw.htm 

This reprint from Circuit world magazine explains both the practice and theory behind modeling transmission lines on multiple dielectric PCB substrates. 

This new application note gives a clear and easy to read explanation of the critical length of a transmission line.  Written for Polar by Dr. Eric Bogatin this article is an ideal place to broaden your knowledge of PCB transmission line behaviour.  If you like this you will also find a broad range of PCB signal integrity related training materials on the Bogatin Enterprises website. www.bogent.com 

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This application note provides a brief theoretical background to the impedance calculation methods used in the Polar Si6000 field solver.

IPC Paper — "Calculation of PCB track impedance"
Andrew J Burkhardt, Christopher S Gregg & J Alan Staniforth 

The use of high-speed circuits requires PCB tracks to be designed with controlled (characteristic, odd-mode, or differential) impedances.

For evaluating these impedances there are several well known published sources of equations that address a variety of configurations including stripline, surface microstrip, and their coplanar variants.

However, for some configurations there are differences between the equations given in these publications. The authors of this paper believe that it is now opportune to examine the origin of the equations and to update the method of calculation for use with modern personal computers.

Calculating differential and coplanar impedance on FR4

FR4 is a composite material, in most cases its a good approximation to assume a dielectric constant Er of 4.2. However, research into the prediction of impedance of edge coupled differential and coplanar structures has shown for the best results you need to take into account the composite structure of the material.

Paper — Calculating differential impedance on FR4 (pdf) (500k)

This paper discusses discrepancies between calculated and measured values of impedance for differential transmission lines on FR4 - especially noticeable in the case of surface microstrip configurations. The anomaly is shown to be due to the nature of the substrate material which needs to be considered as a layered structure of epoxy resin and glass fibre.

Calculations, using Boundary Element field methods, show that the distribution of the electric field within this layered structure determines the apparent dielectric constant and therefore affects the impedance. The paper shows that FR4 cannot be considered to be uniform dielectric when calculating differential impedance.

Effect of risetime on the TDR measurement of impedance

This application note is intended to give guidance to those making impedance measurements on industry standard 6 inch long coupons. The note will show that in this situation the use of risetimes shorter than 200ps will yield no advantage and in fact may prove more difficult to use.

If PCB traces are routed closely together the signals on those traces can interfere with each other. This effect is known as crosstalk. The magnitude of the crosstalk on an adjacent trace is directly controlled by the interference of an adjacent electric field. Minimising the overlap of electric fields will reduce crosstalk and ensure maximum signal integrity.  This application note shows graphically how moving a trace closer to a plane helps reduce the area of influence of the electric field (more).

The Si8000 functions included in Excel format provide powerful analytical capabilities, allowing you to graph the effects of a range of parameter value changes. This tutorial explains how to change the axes of charts in Si8000 Excel workbooks so you can graph any variable you choose – Z₀ against H, Z₀ against E_r, etc.
The tutorial assumes a basic working knowledge of Microsoft Excel.

The Si8000 Field Solver uses the familiar Microsoft Excel for Windows interface for easy graphing and data sharing. Using Excel’s powerful Autofill and Chart Wizard features, the Si8000 can rapidly chart Z₀ against a varying parameter, providing easy comparison and evaluation of the behaviour of most popular controlled impedance structures. 
The tutorial assumes a basic working knowledge of Microsoft Excel.

The Si8000 Goal Seek function is a powerful tool — given a controlled impedance structure's target impedance it can solve for track widths when other parameters (often dictated by manufacturing constraints) are provided. For some applications it's necessary to perform multiple "goal seeks" to achieve the final structure. In this note we use Excel's powerful macro language, Visual Basic for Applications (VBA) to construct a tapered transmission line structure. 

The new SB200a Professional edition is designed to communicate and share layer stackup information with the Si8000m controlled impedance field solver. Together they form a powerful unified system for documentation and design of complex high speed PCB layer stackups and associated transmission line structures.

To realise communication between the two packages Si8000m existing customers need to update to Si8000 Version 3.00 or above.  Version 3.xx includes the links between the two products and supports some additional typical impedance controlled structures for multiple dielectric stackups.

This application note describes a simple FLEXLm server-side installation for both the Polar Si8000m and for Interface Module products that incorporate the Polar Impedance Calculation engine. 

This application note demonstrate how the modelling on the Polar Si8000 offers a significant enhancement over the Si6000 when trying to predict the finished impedance of surface microstrips.

Printed circuit boards are often prototyped at a prototype/quick turn specialist shop before hand over to a volume plant. This note explains how impedance may be affected when the prototype shop and the volume fabricator deploy different soldermask application methods and describes how the Polar Instruments Si8000 Field Solver can be use to predict changes in the final impedance value of LPI coated differential traces due to non-uniform coating thickness.

Designers and fabricators are increasingly concerned with the effects on PCB transmission line losses of the surface roughness of the copper layers within a stackup. With the Si9000 versions 9.01 and above you can include values for surface roughness in frequency dependent calculations. Charting dielectric losses along with conductor losses and attenuation values that include compensation for surface roughness can help isolate the contributions of the different loss mechanisms. 

From a modelling standpoint the broadside-coupled differential pair without ground is like a paired wire transmission line. This structure does not appear directly in the Si8000/9000 field solver; this application note discusses how to use one of the standard Si8000/9000 structures to predict the finished impedance and suggests a method of testing for this differential structure.

From a modelling standpoint the differential pair without ground is like a paired wire transmission line. Although this structure does not appear in the Si8000/9000 field solver this note shows how to use one of the standard Si8000/9000 structures to predict the finished impedance and suggests a method of testing for this differential structure.

The Si9000 v7 and later allows graphical representation of s-parameters S₁₁ and S₂₁ via a Smith Chart, a tool widely used for graphic solution of transmission-line networks. This note briefly discusses how reflection and transmission coefficients S₁₁ and S₂₁ of a typical 50 Ohm controlled impedance structure, represented as a transmission line, are graphed by the Si9000.

This application note describes how the Si9000 PCB Transmission Line Field Solver fully takes into consideration power plane thickness in frequency dependent calculations.

The Si9000 extracts RLGC matrices and 2-Port (single-ended) or 4-Port (differential) s-parameters and rapidly plots transmission line information for the structure under design. This application note provides a simple introduction to the concepts of s-parameters, or scattering parameters, which describe the "scattering", reflection and transmission of travelling waves when a linear network is inserted into a transmission line.

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