PCB Stackup Design & Tools
Application notes

The Polar Application Note library includes a comprehensive resource of information on stackup design and build. Use the search engine below to locate your subject of interest.

With PCB manufacturing supply chains becoming longer, increasing in distance both in time and geography — and modern circuit board designs increasingly complex — there is now great potential for communication error between PCB procurement specialists, PCB field application engineers and front end teams. This note describes how Speedstack technical reports provide a flexible and high quality communication tool for PCB fabricators and brokers.

Installing the Stackup Design System

Using the Stackup Design System  

Using the Speedstack Coupon Generator

Using the PLG100

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Audience: Will interest you if you want to offer initial training on how PCB fabrication effects impedance, this presentation is valuable to technicians starting training in PCB fabrication, and new designers who need an initial insight into aspects of PCB fabrication. The note is also of interest to companies involved in assembling PCBs as it sheds some light on the processes a PCB undergoes before it is populated.

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With PCB manufacturing supply chains becoming longer, increasing in distance both in time and geography — and modern circuit board designs increasingly complex — there is now great potential for communication error between PCB procurement specialists, PCB field application engineers and front end teams. This note describes how Speedstack technical reports provide a flexible and high quality communication tool for PCB fabricators and brokers.

Speedstack 2008 v3.2 includes parameter unit switching (between microns, mils, millimeters and inches). This note describes the upgrade and unit conversion processes when Speedstack 2008 v3.2 is started for new installations, upgrades from earlier versions and subsequent launches.

This application note describes a simple FLEXLm server-side installation for both the Polar SI8000m and for OEM products that incorporate the Polar Impedance Calculation engine. 

The "node locked" version of the SB200 looks for its license file on the machine containing the SB200 software. This application note outlines the installation process for licenses locked to the local ethernet address or USB or parallel keys.

Customers may request a free time limited evaluation licence for the SB200 Stackup Design System for evaluation. This application note outlines the installation process for evaluation licenses.

Customers may request a free12 month licence for  the SB200 Stackup viewer. This application note outlines the installation process for viewer licenses.

This application note discusses upgrading from earlier versions of the SB200 — resetting configuration settings, backing up old libraries and converting version 5.x stackups.

This note outlines the process of converting SB200 v5.x library, stackup and project files to v6 format using the SB200 File Converter.

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1 View article: (Happy Thoughts)

2. Stack up file  download (here) - can be viewed in SB200

3. Monte Carlo analysis - (requires a full licence or licensed evaluation of Si8000m) - download (here)


Hint: Once you have downloaded you will need to save the spreadsheet in a suitable folder then open the Si8000 Expert version. Once Excel has loaded open the Monte Carlo spreadsheet - use the F9 key in Excel to run the Monte Carlo analysis for yourself.

Thanks to Westwood PCB for the permission to use the above resources and Circuitree for the article.

PCB designers often wish to verify that the stack design to be sent to a PC fabrication company is manufacturable. Speedstack 2008, with its  "Remake Stack with Autostack" facility, makes it easy for PCB designer and fabricator to share builds and verify that the stack can be realised with the fabricator's available materials.

A common challenge for PCB fabricators is taking an existing FR4 stack and redesigning it for lead- free builds. Speedstack 2008 offers a powerful and automatic solution to this tedious process. In this note we change the core and prepreg materials from standard FR4 to material with a higher performance with only a few mouse clicks. 

Polar's Speedstack PCB Stackup Builder incorporates a comprehensive Design Rules Check (DRC) function that includes checks for symmetry, copper balance, minimum trace and gap widths and excess resin, etc. Values for excess resin may be added to the material libraries for prepregs. This application note discusses how to calculate the excess resin value for the Polar Speedstack library field.

The SB200a is fully integrated with the Si8000 Controlled Impedance Quick Solver/Si9000 PCB Transmission Line Field Solver to allow easy addition of controlled impedance structures to  layers in the stackup. The H Value (the effective height of a dielectric substrate after the pressing of the stack) calculation produces the dielectric heights required for the Polar SI8000/9000 field solvers.

The SB200 Symmetrical Build function provides dramatic reductions in stackup creation time. With just a few mouse clicks you can create a design-rule checked symmetrical stackup in minutes.  

Calculating impedance accurately on striplines depends on the relative positions of prepreg and core in the stack. This presentation explains graphically how to ensure your calculations are as accurate as possible.(Download)

The SB200 incorporates the facility to add controlled impedance structures to a layer in the stackup. Structure parameters may be copied to the Si8000 Quick Solver for processing (for example by the Si8000 Goal Seeking function) and calculated values pasted back to the SB200 for insertion into the stackup.

This application note outlines the process of exchanging controlled impedance parameters between the SB200 and the Si8000 to add a controlled impedance structure with the correct impedance value to a stackup layer.

The new SB200a Professional edition is designed to communicate and share layer stackup information with the Si8000m controlled impedance field solver. Together they form a powerful unified system for documentation and design of complex high speed PCB layer stackups and associated transmission line structures.

To realise communication between the two packages Si8000m existing customers need to update to Si8000 Version 3.00 or above.  Version 3.xx includes the links between the two products and supports some additional typical impedance controlled structures for multiple dielectric stackups.

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The Speedstack Coupon Generator product will quickly and easily generate controlled impedance test coupons from existing Speedstack projects. Download this Introduction to the Coupon Generator (PDF).

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The PLG100 is able both to make and record single measurements for line widths and to take averages over a series of measurements. For example, the PLG100 can be used to record a series of measurements over the length of a line and return a single averaged value for the line width. This application note describes measurement recording for single and averaged measurements.